TSMC Standard Cell Libraries — 90NM

Other libraries: 40NM — 45M — 65NM — 90NM — 130NM — 150NM

Contact foundrysupport@magma-da.com with any questions.

Process Name	Library Name	Description	Version
CLN90LP	TCBN90LPHP	TSMC 90nm Low-power process (1P9M,1.2v/2.5v), 0.28um x-pitch, nominal-Vt, 9-tracks. Raw gate density = 436 KGate/mm^2, Support multi-Vdd design (include level shifter cell and isolation cell inside)	150j
	TCBN90LPHPHVT	TSMC 90nm Low-power process (1P9M,1.2v/2.5v), 0.28um x-pitch, nominal-Vt, 9-tracks. Raw gate density = 436 KGate/mm^2, Support multi-Vdd design (include level shifter cell and isolation cell inside)	150j
	TCBN90LPHPLVT	TSMC 90nm Low-power process (1P9M,1.2v/2.5v), 0.28um x-pitch, nominal-Vt, 9-tracks. Raw gate density = 436 KGate/mm^2, Support multi-Vdd design (include level shifter cell and isolation cell inside)	150j
	TCBN90LPHPULVT	TSMC 90nm Low-power process (1P9M,1.2v/2.5v), 0.28um x-pitch, Ultra-Low-Vt, total 867 cells(include filler cells), 9-tracks. Raw gate density = 436 KGate/mm^2, Support multi-Vdd design (include level shifter cell and isolation cell inside)	200a

	TCBN90LPHPWB	TSMC 90nm Low-power process (1P9M,1.2v/2.5v), 0.28um x-pitch, nominal-Vt, total 845 cells (base cell: 805 cells, ECO cell: 32 cells, 7 filler cells + 1 TAP cell), 9-tracks, back-bias library, bias voltage = 0.6V, Raw gate density = 451 Kgate/mm^2	150c
	TCBN90LPHPHVTWB	TSMC 90nm Low-power process (1P9M,1.2v/2.5v), 0.28um x-pitch, High-Vt, total 845 cells (base cell: 805 cells, ECO cell: 32 cells, 7 filler cells + 1 TAP cell), 9-tracks, back-bias library, bias voltage = 0.6V, Raw gate density = 451 Kgate/mm^2	150d
	TCBN90LPHPLVTWB	TSMC 90nm Low-power process (1P9M,1.2v/2.5v), 0.28um x-pitch, low-Vt, total 845 cells (base cell: 805 cells, ECO cell: 32 cells, 7 filler cells + 1 TAP cell), 9-tracks, back-bias library, bias voltage = 0.6V, Raw gate density = 451 Kgate/mm^2	150c

	TCBN90LPHPCG	TSMC 90nm Low-power process (1P9M, core 1.2V), Coarse-grain MTCMOS library, Standard-Vt . Include special cell for 1) power switch header cell, 2) retention flip-flop cell, 3) always on cell	150f
	TCBN90LPHPHVTCG	TSMC 90nm Low-power process (1P9M,1.2v/2.5v), 0.28um x-pitch, nominal-Vt, 9-tracks. Raw gate density = 436 KGate/mm^2, Support multi-Vdd design (include level shifter cell and isolation cell inside)	150e
	TCBN90LPHPLVTCG	TSMC 90nm Low-power process (1P9M, core 1.2V), Coarse-grain MTCMOS library, Standard-Vt . Include special cell for 1) power switch header cell, 2) retention flip-flop cell, 3) always on cell	150e

	TCBN90LPHDBWP	TSMC 90nm Logic 1.2V/2.5V Low power process (1P9M, core 1.2V), Standard Vt, 7-track library. 0.28um x-pitch, total 645 cells (include 620 base cells, 9 level shifter cells, 6 isolation cells and 9 filler cells, 1 tapcell), Raw gate density = 560 Kgate/mm^2, Support multi-Vdd design , low-voltage range is 1.0V +/- 10%	200f
	TCBN90LPHDBWPHVT	TSMC 90nm Low-power process (1P9M,1.2v/2.5v), High-Vt, 7-tracks cell height, 645 cells (includes 516 basic cells + 15 multi-voltage cells + 55 clock cells + 1 TAP cell + 9 filler cells + 49 ECO cells ) , Raw gate density = 561 Kgate/mm^2, Support multi-Vdd design , low-voltage range is 1.0V +/- 10%	200f
	TCBN90LPHDBWPLVT	TSMC 90nm Low-power process (1P9M,1.2v/2.5v), Low-Vt, 7-tracks cell height, 645 cells (includes 516 basic cells + 15 multi-voltage cells + 55 clock cells + 1 TAP cell + 9 filler cells + 49 ECO cells ) , Raw gate density = 561 Kgate/mm^2, Support multi-Vdd design , low-voltage range is 1.0V +/- 10%	200f
	TCBN90LPHDBWPULVT	TSMC 90nm Low-power process (1P9M,1.2v/2.5v), Ultra-Low-Vt, 7-tracks cell height, 645 cells (includes 516 basic cells + 15 multi-voltage cells + 55 clock cells + 1 TAP cell + 9 filler cells + 49 ECO cells ) , Raw gate density = 561 Kgate/mm^2, Support multi-Vdd design , low-voltage range is 1.0V +/- 10%	200f

	TCBN90LPHPUD	TSMC 90nm Low-power process (1P9M,1.2v/2.5v), 0.28um x-pitch, Standard-Vt, total 837 cells + 7 filler cells, 9-tracks. Raw gate density = 436 KGate/mm^2 Under-drive 1.0V (1.0V +/-10%)	200a
	TCBN90LPHPUDHVT	TSMC 90nm Low-power process (1P9M,1.2v/2.5v), 0.28um x-pitch, High-Vt, total 837 cells + 7 filler cells, 9-tracks. Raw gate density = 436 KGate/mm^2 Under-drive 1.0V (1.0V +/-10%)	200a
	TCBN90LPHPUDLVT	TSMC 90nm Low-power process (1P9M,1.2v/2.5v), 0.28um x-pitch, Low-Vt, total 837 cells + 7 filler cells, 9-tracks. Raw gate density = 436 KGate/mm^2, Under-drive 1.0V (1.0V +/-10%)	200b

	TCBN90LPBWP7T	TSMC 90nm Logic 1.2V/2.5V Low power process (1P9M, core 1.2V), Standard Vt, 7-track M1 only library. 0.28um x-pitch, total 586 cells (include 562 base cells, 9 level shifter cells, 6 isolation cells and 9 filler cells, 1 tapcell), Raw gate density = 560 Kgate/mm^2, Support multi-Vdd design , low-voltage range is 1.0V +/- 10%	210a
	TCBN90LPBWP7THVT	TSMC 90nm Logic 1.2V/2.5V Low power process (1P9M, core 1.2V), High Vt, 7-track M1 only library. 0.28um x-pitch, total 586 cells (include 562 base cells, 9 level shifter cells, 6 isolation cells and 9 filler cells, 1 tapcell), Raw gate density = 560 Kgate/mm^2, Support multi-Vdd design , low-voltage range is 1.0V +/- 10%	210a
	TCBN90LPBWP7TLVT	TSMC 90nm Logic 1.2V/2.5V Low power process (1P9M, core 1.2V), Low Vt, 7-track M1 only library. 0.28um x-pitch, total 586 cells (include 562 base cells, 9 level shifter cells, 6 isolation cells and 9 filler cells, 1 tapcell), Raw gate density = 560 Kgate/mm^2, Support multi-Vdd design , low-voltage range is 1.0V +/- 10%	210a

CLN90G	TCBN90G	TSMC 90nm Logic 1P9M Generic standard cell library. Total 747 cells + 7 filler cells, 9-tracks. Raw gate density = 423 KGate/mm^2	121a
	TCBN90GHVT	TSMC 90nm Logic 1P9M Generic standard cell library. high-vt, Total 747 cells + 7 filler cells, 9-tracks. Raw gate density = 423 KGate/mm^2	121a
	TCBN90GLVT	TSMC 90nm Logic 1P9M Generic standard cell library. low-vt, Total 747 cells + 7 filler cells, 9-tracks. Raw gate density = 423 KGate/mm^2	121a

	TCBN90GBWP7T	TSMC 90nm Logic 1P9M Generic standard cell library. Total 747 cells + 7 filler cells, 9-tracks. Raw gate density = 423 KGate/mm^2	210a
	TCBN90GBWP7THVT	TSMC 90nm Logic 1P9M Generic standard cell library. high-vt, Total 747 cells + 7 filler cells, 9-tracks. Raw gate density = 423 KGate/mm^2	210a
	TCBN90GBWP7TLVT	TSMC 90nm Logic 1P9M Generic standard cell library. low-vt, Total 747 cells + 7 filler cells, 9-tracks. Raw gate density = 423 KGate/mm^2	210a

	TCBN90GOD	TSMC 90nm Logic 1P9M Generic standard cell library. Over-drive 1.2v, Total 747 cells + 7 filler cells, 9-tracks. Raw gate density = 423 KGate/mm^2	121a
	TCBN90GODHVT	TSMC 90nm Logic 1P9M Generic standard cell library. Over-drive 1.2v, high-vt, Total 747 cells + 7 filler cells, 9-tracks. Raw gate density = 423 KGate/mm^2	121a
	TCBN90GODLVT	TSMC 90nm Logic 1P9M Generic standard cell library. Over-drive 1.2v, low-vt, Total 747 cells + 7 filler cells, 9-tracks. Raw gate density = 423 KGate/mm^2	121a

	TCBN90GHP	TSMC 90nm logic 1P9M generic standard cell library. 0.28um x-pitch, normal-Vt, 9-tracks. Raw gate density = 436 KGate/mm^2, Support multi-Vdd design (include level shifter cell and isolation cell inside)	210b
	TCBN90GHPHVT	TSMC 90nm logic 1P9M generic standard cell library. 0.28um x-pitch, high-Vt, 9-tracks. Raw gate density = 436 KGate/mm^2, Support multi-Vdd design (include level shifter cell and isolation cell inside)	210b
	TCBN90GHPLVT	TSMC 90nm logic 1P9M generic standard cell library. 0.28um x-pitch, Low-Vt, 9-tracks. Raw gate density = 436 KGate/mm^2, Support multi-Vdd design (include level shifter cell and isolation cell inside)	210b

	TCBN90GHPWB	TSMC 90nm generic process (1P9M,1.0v/1.8v, 2.5v, 3.3v), 0.28um x-pitch, standard-Vt, total 837 cells + 7 filler cells + 1 TAP cell, 9-tracks, back-bias library, bias voltage = 0.5V, Raw gate density = 436 Kgate/mm^2	151b
	TCBN90GHPHVTWB	TSMC 90nm generic process (1P9M,1.0v/1.8v, 2.5v, 3.3v), 0.28um x-pitch, High-Vt, total 837 cells + 7 filler cells + 1 TAP cell, 9-tracks, back-bias library, bias voltage = 0.5V, Raw gate density = 436 Kgate/mm^2	151b
	TCBN90GHPLVTWB	TSMC 90nm generic process (1P9M,1.0v/1.8v, 2.5v, 3.3v), 0.28um x-pitch, Low-Vt, total 837 cells + 7 filler cells + 1 TAP cell, 9-tracks, back-bias library, bias voltage = 0.5V, Raw gate density = 436 Kgate/mm^2	151b

	TCBN90GHPOD	TSMC 90nm logic 1P9M generic standard cell library. 0.28um x-pitch, nominal-Vt, Over-Drive 1.2V, total 867 cells(include 805 base cells + 32 ECO cells + 12 level shifter cells + 8 isolation cells + 10 fillers), 9-tracks. Raw gate density = 436 KGate/mm^2, Support multi-Vdd design (include level shifter cell and isolation cell inside)	150b
	TCBN90GHPODHVT	TSMC 90nm logic 1P9M generic standard cell library. 0.28um x-pitch, High-Vt, Over-Drive 1.2V, total 867 cells(include 805 base cells + 32 ECO cells + 12 level shifter cells + 8 isolation cells + 10 fillers), 9-tracks. Raw gate density = 436 KGate/mm^2, Support multi-Vdd design (include level shifter cell and isolation cell inside)	150b
	TCBN90GHPODLVT	TSMC 90nm logic 1P9M generic standard cell library. 0.28um x-pitch, Low-Vt, Over-Drive 1.2V, total 867 cells(include 805 base cells + 32 ECO cells + 12 level shifter cells + 8 isolation cells + 10 fillers), 9-tracks. Raw gate density = 436 KGate/mm^2, Support multi-Vdd design (include level shifter cell and isolation cell inside)	150b

	TCBN90GHPCG	N90G Standard-Vt Coarse-Grain Library, Including Header Switches, Retetetion Registers, and AON Cells	150b
	TCBN90GHPCGHVT	N90G High-Vt Coarse-Grain Library, Including Header Switches, Retetetion Registers, and AON Cells	150b
	TCBN90GHPCGLVT	N90G Low-Vt Coarse-Grain Library, Including Header Switches, Retetetion Registers, and AON Cells	150b

CLN90GT	TCBN90GTHP	TSMC 90nm logic 1P9M standard cell library. 0.28um x-pitch, nominal-Vt, total 837 cells (+7 filler cells), 9-tracks. Raw gate density = 436 KGate/mm^2,	150a
	TCBN90GTHPHVT	TSMC 90nm logic 1P9M standard cell library. 0.28um x-pitch, high-Vt, total 837 cells (+7 filler cells), 9-tracks. Raw gate density = 436 KGate/mm^2	150a
	TCBN90GTHPLVT	TSMC 90nm logic 1P9M standard cell library. 0.28um x-pitch, low-Vt, total 837 cells (+7 filler cells), 9-tracks. Raw gate density = 436 KGate/mm^2.	150a

Partners Directory Become a MagmaTies Partner Partner Events