Jump to content
The SiliconSmart® DFM extensions to the SiliconSmart characterization system enable designers to tackle both systematic and random process variations. By reducing reliance on guard-banding techniques such as OCV and by guiding the selection of higher-yielding cells, SiliconSmart DFM allows designers to increase yield. Random parameter variations are modeled as statistical timing and power tables for statistical analysis. For systematic variations, SiliconSmart DFM models the timing and power sensitivity to the variations and thus enables analytic computation of timing and power when used in conjunction with lithography simulation.
In 90 nanometer (nm) and larger process technologies, systematic and random variation modeling within a die can be mitigated by relatively minor guard banding. However, at 65 nm and below, some of these variations can cause serious problems. For example, channel-length variation can reach double-digit percentages. Today, inter-die, including inter-wafer and inter-lot, variations are modeled using multiple process, voltage and temperature (PVT) corners. In addition, intra-chip variation is modeled by on-chip variation (OCV) analysis. SiliconSmart DFM allows designers to supplement these two techniques with statistical inter-cell and intra-cell modeling techniques that enable statistical timing analysis.Statistical models capture inter-cell and intra-cell variation.
Inter-cell variations may be systematic because devices in close proximity to one another show correlated variation for device (transistor) parameters such as channel length. This is typically caused by aberrations in the optical system of the stepper used for mask exposure. SiliconSmart DFM provides a two-fold characterization methodology to analyze the timing impact of these variations. The first consists of lithography characterization that determines the parameter value based on a cell’s placement neighborhood. The second is a sensitivity characterization that determines the timing effect of the parameter change magnitude. Sensitivity is captured on an arc-by-arc basis for every boundary transistor in every cell in the library. This characterization is called the SI-shapes flow.
Chemical Vapor Deposition: poly grown with gas in furnace
Random variation modeled as intra-cell variation by SiliconSmart DFM.
Intra-cell variations, modeled as random variations, occur for device parameters of individual transistors in a cell. A typical example is the random dopant fluctuations across the die. This is modeled with a standard-deviation (sigma) model. Inside a cell, every transistor’s parameters vary independently leading to independent timing distributions for each transistor. To allow a statistical timer to use this information, SiliconSmart DFM generates a statistical timing distribution standard deviation value for each timing arc within every cell in the library for every slew/load combination by performing Monte Carlo simulations.
The theoretical number of simulations required for statistical characterization can exponentially increase as a function of the number of device parameters being varied in the case of intra-cell variation. This can easily lead to unacceptably long runtimes. SiliconSmartDFM keeps runtime to a minimum by identifying parameters that affect the timing characteristics of a particular timing arc for given slew/load combinations and then by only adding enough samples of parameter variation to improve the second order polynomial equation fit for delta delay.
Measurements • Inter-cell and intra-cell characterization for: – Delay and slew – Setup and hold • Dynamic point selection within each parameter for inter-cell and intra-cell characterization • Linear, second-order and cross-term modeling • SI-shapes characterization support • Statistical leakage support Model Views • CCS-VA • S-ECSM Platform Support • Linux (Red Hat) Supported SPICE Simulators • FineSim™ SPICE • HSPICE • Spectre • Eldo